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Microchip Technology /ATSAML11D15A /OSCCTRL /DPLLPRESC

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Interpret as DPLLPRESC

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7 43 0 0 00 0 0 0 0 0 0 0 0 (DIV1)PRESC

PRESC=DIV1

Description

DPLL Prescaler

Fields

PRESC

Output Clock Prescaler

0 (DIV1): DPLL output is divided by 1

1 (DIV2): DPLL output is divided by 2

2 (DIV4): DPLL output is divided by 4

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data